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Posts by Collection
portfolio
Portfolio item number 2
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publications
Toward High Performance Computing Education
Published in ACM Conference on Innovation and Technology in Computer Science Education., 2020
This paper presents the background of HPC and HPCEd, identifies several of the needed core HPC competencies for students, identifies the support needed by educators for HPCEd, and explores the symbiosis between HPCEd and computing education in contemporary areas such as artificial intelligence and data science, as well as how HPCEd can be applied to benefit diverse non-computing domains such as atmospheric science, biological sciences and critical infrastructure protection.
Recommended citation: Rajendra K Raj, Carol J Romanowski, Sherif G Aly, Brett A Becker, Juan Chen, Sheikh Ghafoor, Nasser Giacaman, Steven I Gordon, Cruz Izu, Shahram Rahimi, Michael P Robson, Neena Thota. “Toward High Performance Computing Education.” ACM Conference on Innovation and Technology in Computer Science Education. Trondheim, Norway, June 2020. https://dl.acm.org/doi/pdf/10.1145/3437800.3439203
Dynamic Load Sharing in Memory Constrained Devices: A Survey
Published in IEEE World Forum on Internet of Things, 2021
The goal of this paper is to provide a review of recent work on load sharing techniques in an IoT ecosystem in order to create a robust compilation of the current state of the art in load-sharing in IoT
Recommended citation: Ebelechukwu Nwafor, Michael Robson, Habeeb Olufowobi. “Dynamic Load Sharing in Memory Constrained Devices: A Survey.” IEEE World Forum on Internet of Things. New Orleans, LA, June 2021. http://academicpages.github.io/files/paper2.pdf
An Open-Publishing Response to the COVID-19 Infodemic
Published in Digital Infrastructures for Scholarly Content Objects, 2021
Our project illustrates the power of open publishing to organize both technical and non-technical scientists to aggregate and disseminate information in response to an evolving crisis.
Recommended citation: Halie M. Rando, Simina M. Boca, Lucy D’Agostino McGowan, Daniel S. Himmelstein, Michael P. Robson, Vincent Rubinetti, Ryan Velazquez, COVID-19 Review Consortium, Casey S. Greene, Anthony Gitter. “An Open-Publishing Response to the COVID-19 Infodemic.” Digital Infrastructures for Scholarly Content Objects. Champaign, IL, September 2021. https://ceur-ws.org/Vol-2976/paper-2.pdf
Generative Artificial Intelligence Reproducibility and Consensus
Published in arXiv, 2023
Reproducibility is one of the pillars of scientific research for verifiability, benchmarking, trust, and transparency. We compared artificially generated data samples to answer the critical question - can we reproduce the results of generative AI models? This work provides a practical, solid foundation for AI verification, reproducibility, and consensus for generative AI applications.
Recommended citation: Edward Kim, Isamu Isozaki, Naomi Sirkin, and Michael Robson. "Generative Artificial Intelligence Reproducibility and Consensus." arXiv preprint arXiv:2307.01898 (2023). https://arxiv.org/abs/2307.01898
Simulating Load Sharing for Resource Constrained Devices
Published in IEEE Access, 2024
We propose a standard resource-constrained device-focused load-sharing simulation framework that is modular, extendable and integrates with existing general-purpose simulation tools. To demonstrate the effectiveness of our method, we implement the framework in OMNeT++ and investigate the performance of several traditional load-sharing algorithms. We also propose a novel heuristics-based space-efficient load-sharing algorithm and find that this approach improves the fairness in task distribution across the network.
Recommended citation: Christopher Kolimago, Michael Robson, Habeeb Olufowobi, and Ebelechukwu Nwafor. "Simulating load sharing for resource constrained devices." IEEE Access 12 (2024): 157021-157038. https://ieeexplore.ieee.org/document/10706850
Structured Post-Evaluation Interviews and Remediation (SPEIR): A Formative Assessment Workflow.
Published in CCSCNE, 2026
We introduce Structured Post-Evaluation Interviews and Remediation (SPEIR), a workflow that extends two-tier Justified Multiple-Choice Questions (JMCQs) with guided discussions and targeted recovery opportunities to surface and address those hidden misunderstandings. Implemented across ten course sections and compared with a traditional MCQ control, SPEIR showed that correctness alone substantially overestimates understanding, while per-question analyses revealed higher rates of fully correct reasoning in SPEIR sections.
Recommended citation: Pablo Frank-Bolton, Michael Robson, R. Jordan Crouser, and Rahul Simha. "Structured Post-Evaluation Interviews and Remediation (SPEIR): A Formative Assessment Workflow." Conference of the Consortium for Computing Sciences in Colleges Northeast Region Northampton, MA, April 2026. http://mprobson.github.io/files/SPEIR_CCSCNE_26.pdf
Evaluating LLM Generated Task Codes
Published in HIPS@IPDPS, 2026
We extend the ParEval benchmark to evaluate the ability of large language models to generate code for HPX, a representative AMT runtime, testing both closed and open-source models on existing parallel programming tasks plus new AMT-specific prompts This work establishes a comprehensive baseline for LLM performance on under-resourced AMT languages and identifies areas for improvement in developing intelligent assistants for advanced parallel programming frameworks.
Recommended citation: Sanjana Yasna, Simon Garcia de Gonzalo, and Michael Robson. "Evaluating LLM Generated Task Codes." Workshop on High-level Parallel Programming Models and Supportive Environments. New Orleans, LA, May 25, 2026. http://mprobson.github.io/files/ParEval_AMT_HIPS_2026.pdf
talks
Flexible Hierarchical Execution of Parallel Task Loops
Published:
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Combining Worksharing and Overdecomposition for Improved Communication-Computation Overlap
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Harnessing Alternative Approaches in Supercomputing for Scientific Progress
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teaching
CSC 231 Microprocessors and Assembly Language
Undergraduate course, Smith College, Computer Science, 2023
An introduction to the architecture of the Intel Pentium class processor and its assembly language in the Linux environment. Students write programs in assembly and explore the architectural features of the Pentium, including its use of the memory, the data formats used to represent information, the implementation of high-level language constructs, integer and floating-point arithmetic, and how the processor deals with I/O devices and interrupts.
CSC 352 Parallel Programming
Undergraduate course, Smith College, Computer Science, 2023
Theoretical and practical models of parallel computing and their appropriate application; Flynn’s taxonomy, including shared memory (e.g. OpenMP), distributed (e.g. MPI), and GPU (e.g. CUDA) programming. Design of various parallel machines and architectures. Measures of parallel performance including speedup and scalability.